Intel is poised to abandon hyper-threading with its upcoming Arrow Lake and Lunar Lake processors. Speculation suggests it will be substituted with an advanced multi-threading technology named “Rentable Units.” Further details can be found in the linked article. There has been much debate regarding Intel’s choice to eliminate hyper-threading in its next line of processors, partly due to incompatibility with the E-cores.

Ori Lempel, Senior Principal Engineer in the P-core architecture team, provided insights in the recent episode of “Architecture Explained” on Intel’s official YouTube channel. He highlighted that the main focus behind the Lion Cove core architecture was energy efficiency (efficiency per watt). This prompted a reevaluation of hyper-threading to determine its value in terms of additional logic.

Implementing hyper-threading or simultaneous multi-threading involves integrating a second structural state per core to manage the logical thread (state, resources, flow, etc.). Hyper-threading can at times hinder performance by causing competition between the two threads for cache utilization. In scenarios like gaming, a single thread can utilize the entire cache block, enhancing frame rates by boosting hit rates.

Ori suggests that eliminating hyper-threading enhances performance per watt and area. Intel’s official data indicates a 5% improvement in performance per watt and a 15% rise in performance/power/area. Additionally, there was a 15% decrease in performance/area.

The main bottleneck for Lunar Lake is the TDP (15-28W), which prompted Intel’s engineers to discard hyper-threading. Ori elucidates that on power-limited mobile platforms like Lunar Lake, introducing the second thread does not elevate your overall IPC or throughput. Instead, the team concentrated on the microarchitecture, widening the core, execution ports, and branch predictor to achieve higher IPCs at an efficient power scale.

When discussing performance, it is essential to consider the power context. There are specific platforms where hyperthreading does not offer significant benefits due to power constraints. Adding that extra thread does not boost overall throughput significantly. We prioritized microarchitecture enhancements not just to raise IPC for this core iteration but also to eliminate key obstacles and pave the path for future scalability.

Ori Lempel, Senior Principal Engineer, P-core Architecture Team